Provide leadership for a dedicated team of hardware and software engineers to define and implement the CPU level microarchitecture related to cache hierarchy designs, scan test, and ATPG. Influence and drive improvements in scan architecture, scan coverage, scan test models, and project execution and quality. Write and maintain external specifications for product and test

Performance Optimization Collaborate with hardware and software teams to enhance the overall performance of GPU clusters, focusing on aspects such as RDMA throughput, latency, and collective communications. Benchmarking and Analysis Develop and execute comprehensive benchmarking strategies to assess baseline performance, analyze bottlenecks, and identify areas for improve

Integrate low level client AI device code generation with device drivers and firmware. Cross boundaries between driver/firmware/compiler/userland on Windows and Linux to drive overall product integration. Collaborate with teams building ML code generation libraries. Preferred Experience in following tools/flows Familiarity with operating system internals and resource mana

Assume ownership in development and/or verification of firmware designed for an embedded microcontroller Develop and verify firmware in C/C++ Occasional creation of utility software using C++, Perl, Python Work with HW design and verification engineers to verify firmware features Contribute to architecture of hardware, firmware and power management features PREFERRED EXPE

Lead Engineer responsible for designing, developing, debugging, verifying and/or validating firmware, software and/or hardware Lead day to day firmware development work Provide consultation to internal and external customers regarding AMD features and programming requirements PREFERRED EXPERIENCE Multiple prior years of related firmware experience combined with technical

Isolate generic system level failures into a more focused area of the platform or CPU Drive debug and resolution of Zen CPU validation issues across silicon, firmware/BIOS, and coordinating with memory partners as needed Develop x86 content to exercise new features and reproduce complex bugs in silicon Devise validation strategy from pre silicon through customer adoption

Manage projects Demonstrated success of working across functional organizations, driving teams in the creation of project strategies and execution of planned work Ability to network, build relationships and drive effective decision making across multiple functions and levels within the organization Customer focused and solution oriented mindset approach to leading work wi

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD

Assist with and monitor case initiations and extensions of US non immigrant and immigrant visas (H 1B, L 1A/B, O 1, TN, E 3, F 1, PERM [EB 1A/B/C], I 140, AOS etc.). Act as a liaison with employees, managers, directors, human resources, global mobility, and talent acquisition to process visa transfers, extensions, change of status requests, and US permanent residency (gre

Design and implement database solutions to support data analytics requirements, ensuring scalability, performance, and reliability. Optimize database performance through indexing, query optimization, and other tuning techniques. Develop and maintain data models, schemas, and database documentation. Collaborate with cross functional teams to understand data requirements an

Working with Architects and reads documentation to understand features to be implemented and verified Block level test plan creation with the fully understanding of Design Specification UVM block level test bench creation and maintenance Block level test creation in directed and random constraints covering all features usage model and corner cases, for both function and p

Some of the expected responsibilities of the candidate will include System level modelling of power IPs, in time and frequency domain, using the models to predict post silicon performance against key metrics. Working with designers in silicon and package and ensure power routing is done to guarantee performance Supply noise analysis at a package and board level and workin

Complete complex mask design of analog, digital, and mixed signal circuits. Own major blocks of the custom IP designs. Direct/advise remote and local resources. Ensure all supplied data from resources are reviewed and meet milestone requirements. Schedule and forecast critical assigned blocks, maintaining schedule. Work closely with Engineering staff to ensure correct req

Execute on RTL design and coding for various sections of the processor core pipeline and related logic. Collaborate with a team of hardware and software engineers to define the high level architecture. Participate in the definition of microarchitecture of next generation high performance processor cores. Contribute to design verification, synthesis, power reduction, timin

Write micro architecture documentation and o wn major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements . Collaborate with architect ure and hardware teams to understand the requirements . Work with verification and physical design teams to achieve high quality design and successful tape out. Design and implement